Staff Mixed-Signal Verification Engineer

• BSEE; MSEE preferred
• 8+ years of professional experience modeling analog and mixed-signal ICs and running top level simulations
• Strong knowledge of most analog cells and analog integrated circuit design concepts and fundamentals to ensure models accurately represent circuit behavior
• Proficient in Cadence mixed signal simulation tools
• Strong knowledge of Verilog, Verilog-A, Verilog-AMS and System Verilog
• Scripting (Perl, Python, or other)
• Knowledge and experience in product development from definition to tapeout
• Strong communication and analytical skills

Triad Overview

Triad Semiconductor is a fabless semiconductor company that focuses on the design and manufacture of analog & mixed-signal integrated circuits. We develop both standard products and custom IC solutions.

Job Description:

Further develop, enhance, and work within the Analog Mixed-Signal (AMS) and Digital Mixed-Signal (DMS) Verification environments. Help establish UVM environments on projects to bring the AMS and DMS development flows into a single verification infrastructure. Collaborate with the Design Lead on projects to create models and verify the top-level designs. This role will report to the Director of Design.

Roles & Responsibilities:

• Create the UVM environment for projects including AMS and DMS development flows
• Generate System Verilog and Verilog-A models
• Collaborate with the Design Lead and other Analog and Digital designers to ensure they can use and update models and run simulations where needed
• Top level and multi-block mixed signal design verification using Cadence simulation tools
• Write clear model documentation
• Drive continuous improvement opportunities that will boost design verification quality and efficiency

Qualification Requirements

• BSEE; MSEE preferred
• 8+ years of professional experience modeling analog and mixed-signal ICs and running top level simulations
• Strong knowledge of most analog cells and analog integrated circuit design concepts and fundamentals to ensure models accurately represent circuit behavior
• Proficient in Cadence mixed signal simulation tools
• Strong knowledge of Verilog, Verilog-A, Verilog-AMS and System Verilog
• Scripting (Perl, Python, or other)
• Knowledge and experience in product development from definition to tapeout
• Strong communication and analytical skills